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Development and implementation of a new topology for power factor correction (PFC) circuit (Record no. 92718)

000 -LEADER
fixed length control field 00646nam a22002177a 4500
001 - CONTROL NUMBER
control field t-4372
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200818161614.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 200625b ||||| |||| 00| 0 eng d
040 ## - CATALOGING SOURCE
Transcribing agency KUL
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title eng
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.381
Item number SUD
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Sudharshan, K M
Relator term Researcher
245 ## - TITLE STATEMENT
Title Development and implementation of a new topology for power factor correction (PFC) circuit
Statement of responsibility, etc Sudharshan, K M
Medium Theses
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Shankaraghatta:
Name of publisher, distributor, etc Kuvempu University,
Date of publication, distribution, etc 2019.
300 ## - PHYSICAL DESCRIPTION
Extent v, 88 p. ;
502 ## - DISSERTATION NOTE
Dissertation note Ph.D
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Power factor correction circuit
-- Electronics
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Divakar, B P
Relator term Guide
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type Thesis and Dissertation
Holdings
Withdrawn status Lost status Damaged status Not for loan Permanent Location Current Location Date acquired Full call number Barcode Date last seen Price effective from Koha item type
        Kuvempu University Library Kuvempu University Library 2020-03-21 621.381 SUD t-4372 2020-06-25 2020-06-25 Thesis and Dissertation

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